KF351 Datasheet | Fairchild Semiconductor

Features - - - - - Internally trimmed offset voltage: 10m V Low input bias current : 50p A Wide gain bandwidth : 4MHz High slew rate : 13V/µs High input impedance : 1012Ω Description The KF351 is JFET input operational amplifier with an internally pensated input offset voltage. The JFET input device provides wide bandwidth, low input bias currents and offset currents. 8-DIP Internal Block Diagram Rev. 1.0.0 ©2001 Fairchild Semiconductor Corporation Schematic Diagram Absolute Maximum Ratings Parameter Supply Voltage Differential Input Voltage Input Voltage Range Output Short Circuit Duration Power Dissipation Operating Temperature Storage Temperature Range Symbol VCC VI(DIFF) VI PD TOPR TSTG Value ±18 30 ±15 Continuous 500 0 ~ +70 -65 ~ +150 Unit V V V m W °C °C Electrical Characteristics (VCC = + 15V, VEE = - 15V, TA = 25 °C. unless otherwise specified) Parameter Input Offset Voltage Input Offset Voltage Drift (Note1) Input Offset Current Input Bias Current Input Resistance (Note1) Large Signal Voltage Gain Output Voltage Swing Input Voltage Range mon Mode Rejection Ratio Power Supply Rejection Ratio Power Supply Current Slew Rate (Note1) Gain-Bandwidth Product (Note1) Note : 1. Guaranteed by design. Symbol VIO ∆VIO/∆T IIO IBAIS RI GV VO(P-P) VI(R) CMRR PSRR ICC SR GBW GV = 1 Conditions RS = 10kΩ 0 °C≤TA≤70 °C RS = 10kΩ 0 °C≤TA≤70 °C 0 °C≤TA≤70 °C 0 °C≤TA≤70 °C VO(P-P)= ± 10V RL=2kΩ RL = 10kΩ RS ≤ 10kΩ RS≤10kΩ 0 °C≤TA≤70 °C Min. 25 15 ±12 ±11 70 70 - Typ. 5.0 10 25 50 10 Max. 10 13 100 4 200 8 3.4 - Unit m V µV/ °C p A n A p A n A Ω V/m V V V d B d B m A V/µs MHz 100 ±13.5 +15 -12 100 100 2.3 13 4 Mechanical Dimensions Package Dimensions in millimeters 8-DIP 1.524 ±0.10 0.018 ±0.004 0.060 ±0.004 0.46 ±0.10 6.40 ±0.20 0.252 ±0.008 0.79 ) 0.031 #8 9.20 ±0.20 0.362 ±0.008 9.60 MAX 0.378 #5 2.54 0.100 5.08 MAX 0.200 7.62 0.300 3.40 ±0.20 0.134 ±0.008 3.30 ±0.30 0.130 ±0.012 0.33 MIN 0.013 #1 #4 - 0.05 0~15° +0.10 -...