GENERAL DESCRIPTION
0.0005V/°C at VCC = 10V), and hysteresis, VT+ − VT− ≥ 0.2 VCC is guaranteed. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND. FEATURES
s Wide supply voltage range: s High noise immunity: 0.4 VCC (typ.) s Hysteresis: 3.0V to 15V 0.70 VCC (typ.) s Low power: TTL compatibility: 0.2 VCC guaranteed 0.4 VCC (typ.): 0.2 VCC guaranteed Ordering Code: Order Number MM74C14M MM74C14N Package Number M14A N14A Package DESCRIPTION
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP and SOIC Top View © 1999 Fairchild Semiconductor Corporation DS005879.prf MM74C14 ABSOLUTE MAXIMUM RATINGS
(Note 1) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Sma...
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