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MM74C76 - Dual J-K Flip-Flops

Download the MM74C76 datasheet PDF. This datasheet also covers the MM74C73 variant, as both devices belong to the same dual j-k flip-flops family and are provided as variant models within a single manufacturer datasheet.

General Description

The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors.

Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs.

Key Features

  • s Supply voltage range: 3V to 15V s Tenth power TTL compatible: Drive 2 LPTTL loads s High noise immunity: 0.45 VCC (typ. ) s Low power: 50 nW (typ. ) s Medium speed operation: 10 MHz (typ. ).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MM74C73_FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MM74C73 • MM74C76 Dual J-K Flip-Flops with Clear and Preset October 1987 Revised January 1999 MM74C73 • MM74C76 Dual J-K Flip-Flops with Clear and Preset General Description The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. The MM74C76 flip flops also include preset inputs and are supplied in 16 pin packages. This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear or preset is independent of the clock and is accomplished by a low level on the respective input.