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NDP7050L Datasheet PDF

Fairchild Semiconductor NDP7050L

This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Part No. NDP7050L
Datasheet NDP7050L Download
Manufacturer
Fairchild Semiconductor
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
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NDP7050L datasheet page 1 preview

GENERAL DESCRIPTION

These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

FEATURES

75A, 50V, RDS(ON) = 0.015Ω @ VGS = 5V Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS(ON). TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications. ________________________________________________________________________________ D G S

ABSOLUTE MAXIMUM RATINGS

Symbol VDSS VDGR VGSS ID Parameter Drain-Source Voltage T C = 25°C unless otherwise noted NDP7050L 50 50 ± 20 ± 40 75 225 150 1 -65 to 175 NDB7050L Units V V V Drain-Gate Voltage (RGS < 1 MΩ) Gate-Source Voltage - Cont...
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