Fairchild Semiconductor RFD14N05L
N-Channel Logic Level Power MOSFET
FEATURES
● 14A, 50V● rDS(ON) = 0.100Ω
● Temperature Compensating PSPICE® Model
● Can be Driven Directly from CMOS, NMOS, and TTL Circuits
● Peak Current vs Pulse Width Curve
● UIS Rating Curve
● 175oC Operating Temperature
● Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol D G S Packaging JEDEC TO-251AA DRAIN (FLANGE) SOURCE DRAIN GATE JEDEC TO-252AA GATE SOURCE DRAIN (FLANGE) ©2004 Fairchild Semiconductor Corporation RFD14N05L, RFD14N05LSM Rev. C0 RFD14N05L, RFD14N05LSM
ABSOLUTE MAXIMUM RATINGS
TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .