SCAN18540T Datasheet | Fairchild Semiconductor

SCAN18540T Inverting Line Driver with 3-STATE Outputs October 1991 Revised May 2000 SCAN18540T Inverting Line Driver with 3-STATE Outputs General Description The SCAN18540T is a high speed, low-power line driver featuring separate data inputs organized into dual 9-bit bytes with byte-oriented paired output enable control signals. This device is pliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). Features s IEEE 1149.1 (JTAG) pliant s Dual output enable signals per byte s 3-STATE outputs for bus-oriented applications s 9-bit data busses for parity applications s Reduced-swing outputs source 32 m A/sink 64 m A s Guaranteed to drive 50Ω transmission line to TTL input levels of 0.8V and 2.0V s TTL patible inputs s 25 mil pitch SSOP (Shrink Small Outline Package) s Includes CLAMP and HIGHZ instructions s Member of Fairchild’s SCAN products Ordering Code: Order Number SCAN18540TSSC Package Number MS54A Package Description 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Connection Diagram Pin Descriptions Pin Names AI(0- 8) BI(0- 8) AOE1, AOE2 BOE1, BOE2 AO(0- 8) BO(0- 8) Description Input pins, A side Input pins, B side 3-STATE Output Enable Input pins, A side 3-STATE Output Enable Input pins, B side Output pins, A side Output pins, B side Truth Tables Inputs AOE1 L H X L AOE2 L X H L Inputs BOE1 L H X L BOE2 L X H L BI(0- 8) H X X L BO(0- 8) L Z Z H AI(0- 8) H X X L AO(0- 8) L Z Z H H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance © 2000 Fairchild Semiconductor Corporation DS010964 .fairchildsemi. Block Diagrams Byte-A Tap Controller Byte-B Note: BSR stands for Boundary Scan Register .fairchildsemi. Description of BOUNDARY-SCAN Circuitry The scan...