SG6980 Datasheet | Fairchild Semiconductor

DESCRIPTION The highly integrated SG6980 is designed for power supplies with boost power-factor-correction (PFC). It requires very few external ponents to achieve desirable operation and includes versatile protections / pensation. It is available in 16-pin DIP and SOP packages. The innovative switching-charge multiplier divider enhances the PFC circuit’s noise immunity. The proprietary multi-vector control scheme provides a fast transient response in a low-bandwidth PFC loop, in which the overshoot and undershoot of the PFC voltage are clamped. If the feedback loop is broken, SG6980 shuts off to prevent extra-high voltage on output. The PFC gate driver can be synchronized with external SYNC signal and the switching noise can be reduced. During start-up, the RDY (ready) is pulled low until the PFC output voltage reaches the setting level. This signal can be used to control the second forward stage for proper power-on sequence. In addition, SG6980 provides plete protection functions, such as brownout and RI open/short. FEATURES OVERVIEW - - - - - - - - - - - Innovative switching-charge multiplier divider Multi-vector control for improved PFC output transient response 1:1 Synchronous switching with SYNC Average current mode control Remote on/off control Power-on sequence control Programmable PFC output-voltage control Cycle-by-cycle current limiting Over-voltage and under-voltage protections Brownout and open-loop protections Low start-up and operating current APPLICATIONS - - - Active-PFC switching power supplies TV and home appliances puter and tele TYPICAL APPLICATION © System General Corp. Version 1.0.1 (IAO33.0064.B0) -1- .sg..tw - .fairchildsemi. September 17, 2007 Product Specification Single-Stage PFC Controller .. SG6980 PIN CONFIGURATION MARKING DIAGRAMS SG6980TP XXXXXXXYWWV T: D = DIP S=SOP P: Z = Lead Free XXXXXXXX: Wafer Lot Y: Year; WW: Week V: Assembly Location VRMS OTP RI IEA IPFC IMP IPK SYNC IAC VEA FB RDY VDD OUT GND...