SSM1N45B Datasheet | Fairchild Semiconductor

Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and mutation mode. These devices are well suited for electronic ballasts based on half bridge configuration. Features - 0.5A, 450V, RDS(on) = 4.25Ω @VGS = 10 V - Low gate charge ( typical 6.5 n C) - Low Crss ( typical 6.5 p F) - 100% avalanche tested - Improved dv/dt capability - Gate-Source Voltage ± 50V guaranteed G SOT-223 SSM Series G! ! - ◀▲ - - ! Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, Tstg TL Parameter Drain-Source Voltage Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) Gate-Source Voltage Single Pulsed Avalanche Energy (Note 2) Avalanche Current (Note 1) Repetitive Avalanche Energy (Note 1) Peak Diode Recovery...