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74F899 - 9-Bit Latchable Transceiver

General Description

The 74F899 is a 9-bit to 9-bit parity transceiver with transparent latches.

The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data busses in either direction.

Key Features

  • independent latch enables for the A-to-B direction and the B-to-A direction, a select pin for ODD/EVEN parity, and separate error signal output pins for checking parity. Features s Latchable transceiver with output sink of 24 mA at the A-bus and 64 mA at the B-bus s Option to select generate parity and check or “feed-through” data/parity in directions A-to-B or B-to-A s Independent latch enables for A-to-B and B-to-A directions s Select pin for ODD/EVEN parity s ERRA and ERRB output pins for pa.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74F899 9-Bit Latchable Transceiver February 1989 Revised August 1999 74F899 9-Bit Latchable Transceiver with Parity Generator/Checker General Description The 74F899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data busses in either direction. It has a guaranteed current sinking capability of 24 mA at the A-bus and 64 mA at the B-bus. The 74F899 features independent latch enables for the A-to-B direction and the B-to-A direction, a select pin for ODD/EVEN parity, and separate error signal output pins for checking parity.