Datasheet4U Logo Datasheet4U.com

74FR16245 - 16-Bit Transceiver

General Description

The 74FR16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for busoriented applications.

Current sinking capability is 64 mA on both the A and B Ports.

The device is byte controlled.

Key Features

  • s Non-inverting buffers s Bidirectional data paths s A and B output sink capability of 64 mA, source capability of 15 mA s Separate control pins for each byte s Guaranteed pin-to-pin skew s Low 3-STATE IIL s 16-Bit version of the 74F245 or 74F645 Ordering Code: Order Number 74FR16245QC 74FR16245SSC Package Number V44A MS48A Package.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74FR16245 16-Bit Transceiver National
74FR245 Octal Bidirectional Transceiver National
74F00 Quad 2-input NAND gate NXP
74F00 Quad 2-Input NAND Gate Fairchild Semiconductor
74F00 Quad 2-Input NAND Gate National Semiconductor

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74FR16540 16-Bit Buffer/Line Driver
74FR16541 16-Bit Buffer/Line Driver
74FR1074 Dual D-Type Flip-Flop
74FR2240 Octal Buffer/Line Driver
74FR2244 Octal Buffer/Line Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74FR16245 16-Bit Transceiver with 3-STATE Outputs October 1989 Revised August 1999 74FR16245 16-Bit Transceiver with 3-STATE Outputs General Description The 74FR16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for busoriented applications. Current sinking capability is 64 mA on both the A and B Ports. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The transmit/ receive (T/Rn) inputs determine the direction of data flow through the transceiver. The output enable (OEn) inputs disable both A and B Ports by placing them in an high impedance state.