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MM74HC154 - 4-to-16 Line Decoder

General Description

The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications.

It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits.

Key Features

  • s Typical propagation delay: 21 ns s Power supply quiescent current: 80 µA s Wide power supply voltage range: 2.
  • 6V s Low input current: 1 µA maximum Ordering Code: Order Number MM74HC154WM MM74HC154MTC MM74HC154N Package Number M24B MTC24 N24C Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MM74HC154 4-to-16 Line Decoder September 1983 Revised February 1999 MM74HC154 4-to-16 Line Decoder General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits. The MM74HC154 have 4 binary select inputs (A, B, C, and D). If the device is enabled these inputs determine which one of the 16 normally HIGH outputs will go LOW. Two active LOW enables (G1 and G2) are provided to ease cascading of decoders with little or no external logic. Each output can drive 10 low power Schottky TTL equivalent loads, and is functionally and pin equivalent to the 74LS154.