NM27C512 Datasheet | Fairchild Semiconductor

NM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM July 1998 NM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM General Description The NM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured using Fairchild’s proprietary CMOS AMG™ EPROM technology for an excellent bination of speed and economy while providing excellent reliability. The NM27C512 provides microprocessor-based systems storage capacity for portions of operating system and application software. Its 90 ns access time provides no wait-state operation with high-performance CPUs. The NM27C512 offers a single chip solution for the code storage requirements of 100% firmwarebased equipment. Frequently-used software routines are quickly executed from EPROM storage, greatly enhancing system utility. The NM27C512 is configured in the standard JEDEC EPROM pinout which provides an easy upgrade path for systems which are currently using standard EPROMs. The NM27C512 is one member of a high density EPROM Family which range in densities up to 4 Megabit. Features s High performance CMOS - 90 ns access time s Fast turn-off for microprocessor patibility s Manufacturers identification code s JEDEC standard pin configuration - 28-pin PDIP package - 32-pin chip carrier - 28-pin CERDIP package Block Diagram VCC GND VPP OE CE/PGM Output Enable and Chip Enable Logic Output Buffers Data Outputs O0 - O7 Y Decoder .. 524,288-Bit Cell Matrix A0 - A15 Address Inputs ....... X Decoder DS010834-1 AMG is a trademark of WSI, Inc. © 1998 Fairchild Semiconductor Corporation .fairchildsemi. NM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM Connection Diagrams 27C080 27C040 27C020 27C010 27C256 A19 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND XX/VPP XX/VPP XX/VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND DIP...