Download 74LCX32500 Datasheet PDF
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74LCX32500 Description

These 36-bit universal bus transceivers bine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The LCX32500 is designed for low voltage (2.5V or 3.3V) VCC applications with the capability of interfacing to a 5V signal...

74LCX32500 Key Features

  • 1A18 2A1
  • 2A18 1B1
  • 1B18 2B1