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T24C256A Datasheet Eeprom

Manufacturer: First-Rank Technology

Overview: Shenzhen First-Rank Technology Co., Ltd SPECIFICATION T24C128 A/T24C256 A Version 2.0 reserves the right to change this documentation without prior notice. Shenzhen First-Rank Technology Co., Ltd Version: 2.0 Date:22.Nov.2013 Page: 1 of 15 Tel:86-755-2666 3145 Website: .fs-rank.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The T24C128A/T24C256A provides 131,072/262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as4096 words of 8 bits each The device is optimized for use in many industrial and mercial applications where low-power and low-voltage operation are essential.

The T24C128A/T24C256A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages and is accessed via a Two-wire serial interface.

In addition, the T24C128A/T24C256A is available in (1.8V to 5.5V) version Shenzhen First-Rank Technology Co., Ltd █Pin Configuration Shenzhen First-Rank Technology Co., Ltd Version:2.0 Date:22.Nov.2013 Page: 2 of 15 Tel:86-755-2666 3145 Website: .fs-rank./ Fax:86-755-8345 252 ________________________________________________________________________________________________ █ Pin Descriptions Pin Designation Number 1–2 A0 – A1 5

Key Features

  • Wide voltage Operation.
  • VCC = 1.8V to 5.5V Low-Power Devices (ISB = 3 µA @ 5.5V) Available Operating Ambient Temperature: -40°C to +85°C Internally Organized 16,384 X 8 (128K), 32,768 X 8 (256K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1 MHZ(5V), 400 kHz ( 1.8V, 2.7V, 3.3V) Compatibility Write Protect Pin for Hardware Data Protection 64-byte Page (128K/256K) Write Modes Partial Page Writes Allowed Self-timed Wr.

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T24C256A Distributor