DTC107
DTC107 is Bias Resistor Transistor manufactured by First Silicon.
- Part of the DTC101 comparator family.
- Part of the DTC101 comparator family.
SEMICONDUCTOR
TECHNICAL DATA
DTC 101 ~ 108 DTC 110 ~ 112 / 114 /117 DTC 123 / 124
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network resistor. The BRT eliminates these individual ponents by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SOT-23 package which is designed for low power surface mount applications.
2 1
SOT- 23 (TO- 236AB)
- Simplifies Circuit Design
- Reduces Board Space and ponent Count
- The SOT-23 package can be soldered using wave or reflow. The modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die.
PIN 3 PIN 1 BASE (INPUT) R1 COLLECTOR (OUTPUT) PIN 2 EMITTER (GROUND)
R2
MAXIMUM RATINGS (TA = 25 C unless otherwise noted)
Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Total Power Dissipation @ TA = 25 C (Note 1.) Derate above 25 C Symbol VCBO VCEO IC PD Value 50 50 100 246 1.5 Unit Vdc Vdc m Adc m W C/W
DEVICE MARKING AND RESISTOR VALUES
Device DTC101 DTC102 DTC103 DTC104 DTC105 DTC106 DTC107 DTC108 DTC110 DTC111 DTC112 DTC114 DTC117 DTC123 DTC124 Marking A8J A8A A8B A8C A8M A8K A8D A8L A8F A8E A8U A8T A8H A8G A8R R1(K) 4.7 10 22 47 2.2 4.7 10 22 4.7 10 100 47 2.2 1.0 2.2 R2(K) 4.7 10 22 47 47 47 47 47 ∞ ∞ ∞ ∞ 2.2 1.0 ∞ Shipping 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel 3000/Tape & Reel
1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum remended footprint.
2008. 8. 28
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