56F805 Datasheet PDF - Freescale Semiconductor 16-bit Digital Signal Controllers Specs

56F805 - 16-bit Digital Signal Controllers

Datasheet Summary

Description

Added revision history.

Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unifi

Features

1.1.1 Processing Core.
Efficient 16-bit 56800 family processor engine with dual Harvard architecture.
As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency.
Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC).
Two 36-bit accumulators, including extension bits.
16-bit bidirectional barrel shifter.
Parallel instruction set with unique processor addressing modes.
Hardware DO and REP loops.
Thre.

Datasheet Details

Part number	56F805
Manufacturer	Freescale Semiconductor
File Size	306.03 KB
Description	16-bit Digital Signal Controllers
Datasheet	56F805 Datasheet
Additional preview pages of the 56F805 datasheet.

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Full PDF Text Transcription

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56F805 Data Sheet Preliminary Technical Data 56F800 16-bit Digital Signal Controllers DSP56F805 Rev. 16 09/2007 freescale.com Version History Rev. 16 Document Revision History Description of Change Added revision history. Added this text to footnote 2 in Table 3-8: “However, the high pulse width does not have to be any particular percent of the low pulse width.” 56F805 General Description • Up to 40 MIPS at 80MHz core frequency • DSP and MCU functionality in a unified, C-efficient architecture • Hardware DO and REP loops • MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14 addressing modes • 31.

Published: Mar 31, 2015 |