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56F8146 - (56F8146 / 56F8346) 16-bit Digital Signal Controllers

General Description

of Change Pre-Release version, Alpha customers only Initial Public Release Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles.

Addressed additional grammar issues.

Added “Typical Min” values to Table 10-16.

Key Features

  • in italics are NOT available in the 56F8146 device.
  • Up to 60 MIPS at 60MHz core frequency.
  • DSP and MCU functionality in a unified, C-efficient architecture.
  • Access up to 1MB of off-chip program and data memory.
  • Chip Select Logic for glueless interface to ROM and SRAM.
  • 128KB of Program Flash.
  • 4KB of Program RAM.
  • 8KB of Data Flash.
  • 8KB of Data RAM.
  • 8KB of Boot Flash.
  • Up to two 6-channel PWM Modules.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 56F8346/56F8146 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8346 Rev. 15 01/2007 freescale.com Document Revision History Version History Rev 1.0 Rev 2.0 Rev 3.0 Description of Change Pre-Release version, Alpha customers only Initial Public Release Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Added “Typical Min” values to Table 10-16. Edited grammar, spelling, consistency of language throughout family. Updated values in Current Consumption per Power Supply Pin, Table 10-7, Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25.