AN2540 Overview
Key Features
- Instruction dispatching is halted. The sc instruction also ensures that no higher priority exception exists. All previously issued instructions have completed, at least to a point where they are no longer able to cause an exception. However, memory accesses that these instructions cause need not have completed with respect to other processors and mechanisms. The sync instruction can be used to ensure that memory accesses are complete. Instructions that were previously issued complete in the context in which they were issued (privilege, protection, address translation). Instructions that are issued after the synchronizing instruction execute in the new context
- To ensure that context changes occur for instructions after the synchronization, the instruction queue is flushed and all these instructions are refetched with the new contex
