MC68HC908AP64A Overview
15.7.2 ADC Clock Control Register Changed “The ADC clock should be set to between 500kHz and 2MHz” to “The ADC clock should be set to between 500kHz and 1MHz” First general release. Page Number(s) 250 January 2007 Mar 2005 MC68HC908AP A-Family Data Sheet, Rev. 2 4 Freescale Semiconductor List of Chapters Chapter 1 General Description.
