MC68HC908GT8 Overview
COP Block Diagram Updated illustration for clarity Table 6-1. Instruction Set Summary Updated definitions for STOP and WAIT Figure 7-9. Code Example for Switching Clock.
MC68HC908GT8 Key Features
- Corrected third bulleted item to reflect ±4 percent variability Figure 15-1. Forced Monitor Mode (Low)
- Reworked for clarity Figure 15-2. Forced Monitor Mode (High)
- Reworked for clarity May, 2002 Figure 15-3. Standard Monitor Mode
- Reworked for clarity 1.0 Table 15-1. Monitor Mode Signal Requirements and Options
- Reworked for clarity Figure 12-4. Port A I/O Circuit
- Reworked to correct pullup resistor Figure 12-11. Port C I/O Circuit
- Reworked to correct pullup resistor Figure 12-15. Port D I/O Circuit
- Reworked to correct pullup resistor Figure 2-2. Control, Status, and Data Registers
- Corrected ESCI arbiter data register (SCIADAT) to reflect read-only status June, 2002 2.0 Figure 14-19. ESCI Arbiter Con
- Corrected address location designator from $0018 to $000A Figure 14-20. ESCI Arbiter Data Register (SCIADAT)
