MCF5329
Overview
- Version 3 ColdFire variable-length RISC processor core
- System debug support
- JTAG support for system level board testing
- On-chip memories - 16-Kbyte unified write-back cache - 32-Kbyte dual-ported SRAM on CPU internal bus, accessible by core and non-core bus masters (e.g., DMA, FEC, LCD controller, and USB host and OTG)
- Power management
- Liquid Crystal Display Controller (LCDC)
- Embedded Voice-over-IP (VoIP) system solution
- SDR/DDR SDRAM Controller
- Universal Serial Bus (USB) Host Controller
- Universal Serial Bus (USB) On-the-Go (OTG) controller
