FML60N093S2FDHF Datasheet | Fuji Electric

Features Pb-free lead terminal Ro HS pliant Halogen-free molding pound MSL:1, Reflow available Applications For switching Package and Internal circuit chart Drain ⑤ ⑤ ④③ ②① Gate ① Sub-Source for gate drive ② DFN8x8 (Out view: see to 7/8 page) Source ③,④ Absolute Maximum Ratings at TC=25°C (unless otherwise specified) Parameter Drain-Source Voltage Symbol VDS VDSX Continuous Drain Current Pulsed Drain Current Gate-Source Voltage Non-Repetitive Maximum Avalanche Current Non-Repetitive Maximum Avalanche Energy Maximum MOSFET dv/dt Continuous Diode Forward Current Pulsed Diode Forward Current Peak Diode Recovery dv/dt Peak Diode Recovery -di DR/dt IDP VGS IAS EAS dv DS/dt IDR IDRP dv/dt -di DR/dt Maximum Power Dissipation Ptot Operating Channel Temperature Tch Storage Temperature Tstg Note - 1 : Maximum duty cycle D=0.53 Note - 2 : Limited by maximum channel temperature. Note - 3 : Tch ≤ 150 °C, See Figure 1 and 2. Note - 4 : S‌ tarting Tch = 25 °C, IAS = 3 A, L = 165 m H, VDD = 60 V, RG = 50 Ω, See Figure 1 and 2. EAS limited by maximum channel temperature and avalanche current. Note - 5 : IDR ≤32.8 A , -di DR/dt ≤ 100 A/μs, VDS peak ≤ 600 V, Tch ≤ 150 °C. Note - 6 : IDR ≤32.8 A , dv/dt ≤ 30 V/ns, VDS peak ≤ 600 V, Tch ≤ 150 °C. Characteristics 600 600 42.3 26.8 125.6...