Datasheet4U Logo Datasheet4U.com

MB86832 - 32-bit Embedded Controller

This page provides the datasheet information for the MB86832, a member of the MB86831 32-bit Embedded Controller family.

Datasheet Summary

Description

The MB86830 series is a SPARClite

1 series of RISC architecture processors, providing high performance for a variety of embedded applications.

2 architecture, the MB86830 series is upward codecompatible with the conventional products in the SPARClite family.

Features

  • of the MB86830 series achieves high levels of speed, flexibility, and efficiency, making it a line of ideal controllers for a variety of low-cost, high-performance embedded systems.
  • 1 : SPARClite is a trademark of SPARC International, Inc. in the United States. Fujitsu Microelectronics, Inc. has been granted permission to use the trademark.
  • 2 : SPARC is a registered trademark of SPARC International, Inc. in the United States. SPARC is based on technology developed by Sun Microsystems,.

📥 Download Datasheet

Datasheet preview – MB86832

Datasheet Details

Part number MB86832
Manufacturer Fujitsu Media Devices Limited
File Size 1.35 MB
Description 32-bit Embedded Controller
Datasheet download datasheet MB86832 Datasheet
Additional preview pages of the MB86832 datasheet.
Other Datasheets by Fujitsu Media Devices Limited

Full PDF Text Transcription

Click to expand full text
FUJITSU SEMICONDUCTOR DATA SHEET www.DataSheet4U.com DS07-05309-3E Microprocessor SPARClite CMOS 32-bit Embedded Controller MB86830 Series MB86831/832/833/834/835/836 s DESCRIPTION The MB86830 series is a SPARClite *1 series of RISC architecture processors, providing high performance for a variety of embedded applications. Conforming to the SPARC *2 architecture, the MB86830 series is upward codecompatible with the conventional products in the SPARClite family. When running at 100 MHz, the MB86830 series provides performance of 121 VAX-MIPS. The MB86830 series has on-chip data and instruction caches, allowing the processor to operate independently of the wait time for external memory.
Published: |