CS101 Key Features
- Technology : 90 nm Si gate CMOS 7- to 10-metal layers. Low-K (low permittivity) material is used for all dielectric inte
- CS101 Series
- Short-term development using a physical prototyping tool
- One pass design using a physical synthesis tool
- Hierarchical design environment for supporting large-scale circuits
- Support for Signal Integrity, EMI noise reduction
- Support for static timing sign-off
- Optimum package range : FBGA, FC-BGA, PBGA,TEBGA
- MACRO LIBRARIES (including those in preparation)
- AND-OR
