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MB84VA2005 - (MB84VA2004 / MB84VA2005) 8M (x 8) FLASH MEMORY & 1M (x 8) STATIC RAM

Download the MB84VA2005 datasheet PDF. This datasheet also covers the MB84VA2004 variant, as both devices belong to the same (mb84va2004 / mb84va2005) 8m (x 8) flash memory & 1m (x 8) static ram family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Power supply voltage of 2.7 to 3.6 V.
  • High performance 100 ns maximum access time.
  • Operating Temperature.
  • 20 to +85°C.
  • FLASH MEMORY.
  • Minimum 100,000 write/erase cycles.
  • Sector erase architecture One 16 K byte, two 8 K bytes, one 32 K byte, and fifteen 64 K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase.
  • Boot Code Sector Architecture MB84VA2004: Top sector MB84VA2005: Bottom secto.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MB84VA2004_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MB84VA2000 (MB84VA2000 / MB84VA2001) 8M (X 8) FLASH MEMORY & 2M (X 8) STATIC RAM
MB84VA2002 (MB84VA2002 / MB84VA2003) 8M (x 8/x 16) FLASH MEMORY & 2M (x 8) STATIC RAM
MB84VA2003 (MB84VA2002 / MB84VA2003) 8M (x 8/x 16) FLASH MEMORY & 2M (x 8) STATIC RAM
MB84VA2004 (MB84VA2004 / MB84VA2005) 8M (x 8) FLASH MEMORY & 1M (x 8) STATIC RAM
MB84VA2006 (MB84VA2006 / MB84VA2007) 8M (x 8/x 16) FLASH MEMORY & 1M (x 8) STATIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-50106-1E MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 8M (× 8) FLASH MEMORY & 1M (× 8) STATIC RAM MB84VA2004-10/MB84VA2005-10 s FEATURES • Power supply voltage of 2.7 to 3.6 V • High performance 100 ns maximum access time • Operating Temperature –20 to +85°C — FLASH MEMORY • Minimum 100,000 write/erase cycles • Sector erase architecture One 16 K byte, two 8 K bytes, one 32 K byte, and fifteen 64 K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase.