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MB86290A - Graphics Controller

General Description

24 2.3.1 Host CPU Interface24 2.3.2 Video Interface26 2.3.3 Graphics Memory Interface 28 2.3.4 Clock Input 29 3 Host Interface 30 3.1 Operation Mode 30 3.1.1 Host CPU Mode 30 3.1.2 Endian30 3.2 Access Mode 31 3.2.1 SRAM Interface 31 3.2.2 FIFO Interface31 3.3 DMA Transfer 32 3.3.1 Data Transfer Uni

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Graphics Controller Hardware Specifications Revision 2.0b 23 May 2000 MB86290A Copyright © FUJITSU LIMITED 1998, 1999 ALL RIGHTS RESERVED 1 All Rights Reserved The information in this document has been carefully checked and is believed to be reliable. However, Fujitsu Limited assumes no responsibility for inaccuracies. The information in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu Limited, or its subsidiaries. Fujitsu Limited reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu Limited. 2 1 Overview................................