MB91350A
Description
The FR families are lines of standard single-chip microcontrollers each based on a 32-bit high-performance RISC CPU, incorporating a variety of I/O resources and bus control features for embedded control applications which require high CPU performance for This FR60 family is based on FR30 and FR40 families and enhanced is bus access.
Key Features
- Instructions adapted for high-level languages: Function entry/exit instructions, multiple-register load/store instructions (Continued)
- Register interlock functions: Facilitating coding in assemblers
- On-chip multiplier supported at the instruction level. Signed 32-bit multiplication: 5 cycles. Signed 16-bit multiplication: 3 cycles
- Interrupt (PC, PS save): 6 cycles, 16 priority levels
- Harvard architecture allowing program access and data access to be executed simultaneously
- Bus Interface
- Mounted Memory
- DMAC (DMA Controller)
- Capable of simultaneous operation of up to 5 channels (3 channels for external→external operation)
- Three transfer sources (external pin, internal peripheral, software) selectable by software. (Transfer can be started from UART0/1/2.)
