MBM29F800BA
Key Features
- Single 5.0 V read, write, and erase Minimizes system level power requirements
- Compatible with JEDEC-standard commands Uses same software commands as E2PROMs
- Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN - Normal Bend Type, PFTR - Reversed Bend Type) 44-pin SOP (Package suffix: PF)
- Minimum 100,000 write/erase cycles
- High performance 55 ns maximum access time
- Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and fifteen 64K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase.
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector
- Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address
- Data Polling and Toggle Bit feature for detection of program or erase cycle completion
