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MB8117-10 Datasheet PDF

Fujitsu MB8117-10

MB8117 is a fully decoded, dynamic NMOS random access memory organized as 16,384 one-bit words. The design is optimized for highspeed, high performance applications such as mainframe memory, buffer memory peripheral storage and environments where low power dissipation and compact layout are required. The MB8117 Is fabricated using silicon-gate NMOS and FUjitsu's advanced Double-Layer Polysilicon process.
Part No. MB8117-10
Datasheet MB8117-10 Download
Manufacturer
Fujitsu
Description NMOS Dynamic Random Access Memory
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MB8117-10 datasheet page 1 preview

DESCRIPTION

The Fujitsu Multiplexed row and column address inputs permit the MB8117 to be housed in a standard 16-pin DIP. Pin outs conform to the JEDEC approved pin out. This process, coupled with single-transistor memory storage cells, permits maximum circuit density and minimal chip size. Dynamic circuitry is employed In the design, including the sense amplifiers. Clock timing requirements are non-critical, and power supply tolerance Is very wide. All inputs are TIL compatible; the output is three-state TIL.

FEATURES

● 16,384 x 1 RAM, 16 pin package e Silicon-gate, Double Poly NMOS single-transistor cell
● Address access time 100 ns max (MB8117-10) 120 ns max (MB8117-12)
● Cycle time, 235 ns min (MB8117-10) 270 ns min (MB8117-12)
● Low power: 182 mW max (MB8117-10) 160 mW max (MB8117-12) 19_5 mW max (Standby)
● +5V single power supply, :t 10% tolerance
● On-chip substrate bias generator
● All Inputs TTL compatible, low capacitive load
● Thre.state TTL compatible output
● Pin 1 auto...
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