Datasheet4U Logo Datasheet4U.com

MB8117-10 - NMOS Dynamic Random Access Memory

Datasheet Summary

Description

The Fujitsu MB8117 is a fully decoded, dynamic NMOS random access memory organized as 16,384 one-bit words.

Features

  • 16,384 x 1 RAM, 16 pin package e Silicon-gate, Double Poly NMOS single-transistor cell.
  • Address access time 100 ns max (MB8117-10) 120 ns max (MB8117-12).
  • Cycle time, 235 ns min (MB8117-10) 270 ns min (MB8117-12).
  • Low power: 182 mW max (MB8117-10) 160 mW max (MB8117-12) 19_5 mW max (Standby).
  • +5V single power supply, :t 10% tolerance.
  • On-chip substrate bias generator.
  • All Inputs TTL compatible, low capacitive load.
  • Thre. s.

📥 Download Datasheet

Datasheet preview – MB8117-10

Datasheet Details

Part number MB8117-10
Manufacturer Fujitsu
File Size 217.03 KB
Description NMOS Dynamic Random Access Memory
Datasheet download datasheet MB8117-10 Datasheet
Additional preview pages of the MB8117-10 datasheet.

📁 Similar Datasheet

  • MB81 - Single Phase Bridge Rectifier (Micro Commercial Components)
  • MB810 - Single Phase Bridge Rectifier (Micro Commercial Components)
  • MB814400A-70PFTN - CMOS 4M-Bit DRAM (ETC)
  • MB81C4251 - 1M-Bit Dual Port CMOS DRAM (Fujitsu Media Devices)
  • MB81C4253 - 1M-Bit Dual Port CMOS DRAM (Fujitsu Media Devices)
  • MB81C4256-10 - CMOS 1M-Bit DRAM (ETC)
  • MB81C4256A - 256K x 4-Bit Fast Page Mode Low Power DRAM (Fujitsu Media Devices)
  • MB81C81A - CMOS 256K-BIT HIGH-SPEED SRAM (Fujitsu Media Devices)
  • MB81C84A - CMOS 256K-BIT HIGH-SPEED SRAM (Fujitsu Media Devices)
  • MB81C86 - CMOS 256K-BIT HIGH-SPEED SRAM (Fujitsu Media Devices)
Other Datasheets by Fujitsu

Full PDF Text Transcription

Click to expand full text
FUJITSU MICROELECTRONICS NMOS 16,384·BIT DYNAlVIIC RANDOM ACCESS :MEMORY DESCRIPTION The Fujitsu MB8117 is a fully decoded, dynamic NMOS random access memory organized as 16,384 one-bit words. The design is optimized for highspeed, high performance applications such as mainframe memory, buffer memory peripheral storage and environments where low power dissipation and compact layout are required. Multiplexed row and column address inputs permit the MB8117 to be housed in a standard 16-pin DIP. Pin outs conform to the JEDEC approved pin out. The MB8117 Is fabricated using silicon-gate NMOS and FUjitsu's advanced Double-Layer Polysilicon process. This process, coupled with single-transistor memory storage cells, permits maximum circuit density and minimal chip size.
Published: |