MB81C68A Datasheet | Fujitsu Semiconductor Limited

April 1990 Edition 3.0 DATA SHEET FUJITSU MB81 C68A-251-301-35 CMOS 16K-BIT HIGH-SPEED SRAM 4K Words x 4 Bits Static Random Access Memory with Super High-Speed and Automatic Power Down The Fuj~su MB81C68A is a 4,096 words x 4 bits static random access memory fabricated w~h a CMOS silicon gate process. The memory uses asynchronous circu~ry. All pins are TTL patible and a single +5 V power supply is required. A separate chip select (CS) pin simpl Hies multipackage systems design by perm~ing the selection of an individual package when outputs are OR-tied, and then automatically powering down the other deselected packages. The MB81 C68A offers low power dissipation, low cost, and high performance. ( , CERAMIC PACKAGE CERDIP .. - Organization: 4,096 words x 4 b~s - Static operation: no clocks or timing strobe required - Access time: t M = t ACS = 25 ns max. (MBSI C6SA-25) t M- t ACS = 30 ns max. (MB81C6SA-30) t M - t ACS = 35 os max. (MB81C68A-35) - Low power consumption: 385 m W max. (Active) 138 m W max. (Standby, TTL level) 83 m W max. (Standby, CMOS level) - Single +5 V power supply ±1 0% tolerance - TTL patible inputs and outputs - Three-state outputs w~h OR-tie capac~y - Chip select for simplified memory expansion, automatic power down - Electrostatic protection for all inputs and outputs - Standard 2O-pin Plastic Package: DIP MBS1C68A-xx P MB81C6SA-xx PSZ - Standard 20-pin Ceramic Package: CERDIP MB81C68A-xx Z Absolute Maximum Ratings (See Note) Rating Symbol Value Un H Supply Voltage Vcc -{).5 to +7.0 Input Voltaae on any pin w~h respect to NO --3.5 to +7.0 Output Voltage on any 110 pin with respect to...