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MB85RS2MT - 2M (256K x 8) Bit SPI

General Description

MB85RS2MT is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 262,144 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells.

MB85RS2MT adopts the Serial Peripheral Interface (SPI).

Key Features

  • Bit configuration : 262,144 words × 8 bits.
  • Serial Peripheral Interface : SPI (Serial Peripheral Interface) Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1).

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Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MB85RS256 256 K (32 K X 8) Bit SPI
MB85RS256A 256 K (32 K X 8) Bit SPI
MB85RS256B 256K (32K x 8) Bit SPI
MB85RS128A 128K (16 K x 8) Bit SPI
MB85RS128B 128K (16K x 8) Bit SPI

Full PDF Text Transcription (Reference)

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FUJITSU SEMICONDUCTOR DATA SHEET Memory FRAM DS501-00023-0v01-E 2 M (256 K × 8) Bit SPI MB85RS2MT ■ DESCRIPTION MB85RS2MT is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 262,144 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS2MT adopts the Serial Peripheral Interface (SPI). The MB85RS2MT is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85RS2MT can be used for 1013 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM.