FEATURES
1) 1394 Serial Bus Controller Block: Compliant with IEEE1394- 1995 and P1394a draft2.0 Integrates PHY and LINK layers into single- chip. 1394 port number : 1 port Transfer Data Rate : S100, S200, and S400 On- chip PLL : 400MHz for PHY and 50MHz for Link core. Cycle- Master Function On- chip Bus Management CSRs 6- pin cable supported On- chip transceiver and comparator On- chip another comparator for detecting the cable power 2) ContextProgram Controller Block : - Compliant with Open HCI standard draft (revision 1.1) - Total 13 independent ContextProgram Controllers: a) Asynchronous Transmit DMA : 2 channels for response and request each b) Isochronous Transmit DMA : 4 channels c) Receive DMA : 7 channels for Asynchronous response and request each, 4 isochronous, and 1 self- ID receive 1 Preliminary - On- chip 6KB FIFO : a) Asynchronous Transmit- FIFO : 1.5KB b) Isochronous Transmit- FIFO : 1.5KB c) Asynchronous/Isochronous Receive- FIFO : 3.0KB - On- chip context program work...