MBM29DL400TC-55 Overview
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20866-2E FLASH MEMORY CMOS 4M (512K × 8/256K × 16) BIT MBM29DL400TC-55/-70/-90/-12/MBM29DL400BC-55/-70/-90/-12.
MBM29DL400TC-55 Key Features
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- Simultaneous operations Read-while-Erase or Read-while-Program
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts (Pin patible with MBM29LV400TC/BC) 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type)
- Minimum 100,000 program/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sector