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MBM29DL800BA-70 - 8M (1M x 8/512K x 16) BIT FLASH MEMORY

This page provides the datasheet information for the MBM29DL800BA-70, a member of the MBM29DL800TA 8M (1M x 8/512K x 16) BIT FLASH MEMORY family.

Datasheet Summary

Features

  • Single 3.0 V read, program, and erase Minimizes system level power requirements.
  • Simultaneous operations Read-while-Erase or Read-while-Program.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA) 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minim.

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Datasheet preview – MBM29DL800BA-70

Datasheet Details

Part number MBM29DL800BA-70
Manufacturer Fujitsu
File Size 600.85 KB
Description 8M (1M x 8/512K x 16) BIT FLASH MEMORY
Datasheet download datasheet MBM29DL800BA-70 Datasheet
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Full PDF Text Transcription

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FUJITSU SEMICONDUCTOR DATA SHEET DS05-20860-3E FLASH MEMORY CMOS 8M (1M × 8/512K × 16) BIT MBM29DL800TA-70/-90/-12/MBM29DL800BA-70/-90/-12 s FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Simultaneous operations Read-while-Erase or Read-while-Program • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA) 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 70 ns maximum access time • Sector erase architecture Two 16K byte, four 8K bytes, two 32K byte, and fourteen 64K bytes.
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