MBM29DL800TA-12 Overview
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20860-3E FLASH MEMORY CMOS 8M (1M × 8/512K × 16) BIT MBM29DL800TA-70/-90/-12/MBM29DL800BA-70/-90/-12.
MBM29DL800TA-12 Key Features
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- Simultaneous operations Read-while-Erase or Read-while-Program
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts (Pin patible with MBM29LV800TA/BA) 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type) 48-ball FBGA (Package suffix: PBT)
- Minimum 100,000 program/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sector