Datasheet4U Logo Datasheet4U.com

MBM29F800BA-55 - 8M (1M x 8/512K x 16) BIT FLASH MEMORY

This page provides the datasheet information for the MBM29F800BA-55, a member of the MBM29F800TA 8M (1M x 8/512K x 16) BIT FLASH MEMORY family.

Datasheet Summary

Features

  • www. DataSheet4U. com.
  • Single 5.0 V read, write, and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 44-pin SOP (Package suffix: PF).
  • Minimum 100,000 write/erase cycles.
  • High performance 55 ns maximum access time.
  • S.

📥 Download Datasheet

Datasheet preview – MBM29F800BA-55

Datasheet Details

Part number MBM29F800BA-55
Manufacturer Fujitsu
File Size 543.61 KB
Description 8M (1M x 8/512K x 16) BIT FLASH MEMORY
Datasheet download datasheet MBM29F800BA-55 Datasheet
Additional preview pages of the MBM29F800BA-55 datasheet.

📁 Similar Datasheet

  • MBM29F800BA - 8M (1M x 8/512K x 16) BIT FLASH MEMORY (Fujitsu Media Devices)
  • MBM29F800TA - 8M (1M X 8/512K X 16) BIT (Fujitsu Media Devices)
  • MBM29F002BC - 2M (256K X 8) BIT (Fujitsu Media Devices)
  • MBM29F002TC - 2M (256K x 8) BIT FLASH MEMORY (Fujitsu Media Devices)
  • MBM29F004BC - FLASH MEMORY CMOS 4M (512K x 8) BIT (Fujitsu Media Devices)
  • MBM29F004TC - (MBM29F004BC/TC) FLASH MEMORY CMOS 4 M (512 K X 8) BIT (Fujitsu Media Devices)
  • MBM29F016A - 16M (2M x 8) BIT FLASH MEMORY (Fujitsu Media Devices)
  • MBM29F017A - 16M (2M x 8) BIT FLASH MEMORY (Fujitsu Media Devices)
  • MBM29F033C - 32M (4M x 8) BIT FLASH MEMORY (Fujitsu Media Devices)
  • MBM29F040A - FLASH MEMORY 4M 512K x 8 BIT (Fujitsu Media Devices)
Other Datasheets by Fujitsu

Full PDF Text Transcription

Click to expand full text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20841-4E FLASH MEMORY CMOS 8M (1M × 8/512K × 16) BIT MBM29F800TA-55/-70/-90/MBM29F800BA-55/-70/-90 s FEATURES www.DataSheet4U.com • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • Minimum 100,000 write/erase cycles • High performance 55 ns maximum access time • Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and fifteen 64K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase.
Published: |