MBM29F800BA-55 Overview
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20841-4E FLASH MEMORY CMOS 8M (1M × 8/512K × 16) BIT MBM29F800TA-55/-70/-90/MBM29F800BA-55/-70/-90.
MBM29F800BA-55 Key Features
- Single 5.0 V read, write, and erase Minimizes system level power requirements
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type) 44-pin SOP (Package suffix: PF)
- Minimum 100,000 write/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector