MBM29LV001BC-55 Overview
FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 1M (128K × 8) BIT DS05-20861-3E MBM29LV001TC-55/-70/MBM29LV001BC-55/-70.
MBM29LV001BC-55 Key Features
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts 32-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type) 32-pin PLCC (Package suffix: PD)
- Minimum 100,000 program/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector