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MBM29LV001TC-70 - 1M (128K x 8) BIT FLASH MEMORY

Download the MBM29LV001TC-70 datasheet PDF. This datasheet also covers the MBM29LV001BC variant, as both devices belong to the same 1m (128k x 8) bit flash memory family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Single 3.0 V read, program, and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 32-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 32-pin PLCC (Package suffix: PD).
  • Minimum 100,000 program/erase cycles.
  • High performance 55 ns maximum access time.
  • Sector erase archi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBM29LV001BC_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MBM29LV001TC 1M (128K x 8) BIT Fujitsu Media Devices
MBM29LV001BC 1M (128K x 8) BIT FLASH MEMORY Fujitsu Media Devices
MBM29LV002BC 2M (256K x 8) BIT FLASH MEMORY Fujitsu Media Devices
MBM29LV002TC 2M (256K x 8) BIT Fujitsu Media Devices
MBM29LV004BC 4M (512K x 8) BIT FLASH MEMORY Fujitsu Media Devices

Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBM29LV001TC-55 1M (128K x 8) BIT FLASH MEMORY
MBM29LV001BC-55 1M (128K x 8) BIT FLASH MEMORY
MBM29LV001BC-70 1M (128K x 8) BIT FLASH MEMORY
MBM29LV002BC-12 2M (256K x 8) BIT FLASH MEMORY
MBM29LV002BC-70 2M (256K x 8) BIT FLASH MEMORY

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 1M (128K × 8) BIT DS05-20861-3E MBM29LV001TC-55/-70/MBM29LV001BC-55/-70 s FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 32-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 32-pin PLCC (Package suffix: PD) • Minimum 100,000 program/erase cycles • High performance 55 ns maximum access time • Sector erase architecture One 8K byte, two 4K bytes, and seven 16K bytes Any combination of sectors can be concurrently erased.