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MBM29LV017-12 - 16M (2M x 8) BIT FLASH MEMORY

Download the MBM29LV017-12 datasheet PDF. This datasheet also covers the MBM29LV017 variant, as both devices belong to the same 16m (2m x 8) bit flash memory family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Address specification is not necessary during command sequence.
  • Single 3.0 V read, program and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minimum 100,000 program/erase cycles.
  • High performance 8.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBM29LV017_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MBM29LV017 16M (2M x 8) BIT FLASH MEMORY Fujitsu Media Devices
MBM29LV016B 16M (2M x 8) BIT FLASH MEMORY Fujitsu Media Devices
MBM29LV016T 16M (2M x 8) BIT Fujitsu Media Devices
MBM29LV001BC 1M (128K x 8) BIT FLASH MEMORY Fujitsu Media Devices
MBM29LV001TC 1M (128K x 8) BIT Fujitsu Media Devices

Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBM29LV017-80 16M (2M x 8) BIT FLASH MEMORY
MBM29LV017-90 16M (2M x 8) BIT FLASH MEMORY
MBM29LV016B-12 16M (2M x 8) BIT FLASH MEMORY
MBM29LV016B-80 16M (2M x 8) BIT FLASH MEMORY
MBM29LV016B-90 16M (2M x 8) BIT FLASH MEMORY

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M × 8) BIT DS05-20857-4E MBM29LV017-80/-90/-12 s FEATURES • Address specification is not necessary during command sequence • Single 3.0 V read, program and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 80 ns maximum access time • Sector erase architecture Uniform sectors of 64K bytes each Any combination of sectors can be concurrently erased.