MBM29LV400BC-12 Overview
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20862-3E FLASH MEMORY CMOS 4M (512K × 8/256K × 16) BIT MBM29LV400TC-70/-90/-12/MBM29LV400BC-70/-90/-12.
MBM29LV400BC-12 Key Features
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type) 44-pin SOP (Package suffix: PF) 48-pin CSOP (Package suffix: PCV) 48-ball FBGA (Package suffix: PBT)
- Minimum 100,000 program/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sect