MBM29SL160BD-12 Overview
FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT DS05-20877-1E MBM29SL160TD-10/-12/MBM29SL160BD-10/-12.
MBM29SL160BD-12 Key Features
- Single 1.8 V read, program, and erase Minimizes system level power requirements
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type) 48-ball FBGA (Package suffix: PBT)
- Minimum 100,000 program/erase cycles
- High performance
- Sector erase architecture
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- One Time Protect (OTP) region 256 Byte of OTP, accessible through a new “OTP Enable” mand sequence Factory se