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MBM29SL160BD-12 - 16M (2M x 8/1M x 16) BIT FLASH MEMORY

This page provides the datasheet information for the MBM29SL160BD-12, a member of the MBM29SL160TD 16M (2M x 8/1M x 16) BIT FLASH MEMORY family.

Features

  • Single 1.8 V read, program, and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minimum 100,000 program/erase cycles.
  • High performance 100 ns maximum access time.
  • Sector erase ar.

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Datasheet preview – MBM29SL160BD-12

Datasheet Details

Part number MBM29SL160BD-12
Manufacturer Fujitsu
File Size 715.90 KB
Description 16M (2M x 8/1M x 16) BIT FLASH MEMORY
Datasheet download datasheet MBM29SL160BD-12 Datasheet
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Full PDF Text Transcription

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FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT DS05-20877-1E MBM29SL160TD-10/-12/MBM29SL160BD-10/-12 s FEATURES • Single 1.8 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 100 ns maximum access time • Sector erase architecture Eight 4K word and thirty one 32K word sectors in word mode Eight 8K byte and thirty one 64K byte sectors in byte mode Any combination of sectors can be concurrently erased. Also supports full chip erase.
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