DESCRIPTION
The instruction set of F2MC-16L CPU core inherits AT architecture of F2MC-8 family with additional instruction sets for high-level languages, extended addressing mode, enhanced multiplication/division instructions, and enhanced bit manipulation instructions. The microcontroller has a 32-bit accumulator for processing long word data (32-bit). The MB90670/675 series has peripheral resources of UART0, UART1(SCI), an 8/10-bit A/D converter, an 8/16-bit PPG timer, a 16-bit reload timer, a 24-bit free run timer, an output compare (OCU), an input capture (ICU), DTP/external interrupt circuit, an I2C*2 interface (in MB90675 series only). Embedded peripheral resources performs data transmission with an intelligent I/O service function without the intervention of the CPU, enabling real-time control in various applications. *1: F2MC stands for FUJITSU Flexible Microcontroller. *2: Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these com...