GENESYS LOGIC GL800HT25
USB 2.0 UTMI Compliant Transceiver IP Core
| Part No. | GL800HT25 |
|---|---|
| Datasheet | GL800HT25 Download |
| Manufacturer |  GENESYS LOGIC |
| Description | USB 2.0 UTMI Compliant Transceiver IP Core |
| Buy | Stock & Price |
DESCRIPTION
1. Remove Optional Output Signals in Sec.VII. 2. Add Testing Circuit in Sec.IX. 3. Add IX.6 application circuit for tester. Modify VII.2 Interface port description. (1) Pad descriptions are separated from interface signals. (2) Use the same pad names and pad order as layout. (3) Add description for bonding options. 1. Insert table for operation mode in Sec IX.2 2. Add some description on analogue test. 1. Insert table for pin description while in testing. 2. Add some description on analogue test. 3. More description on layout guide. 1. Revert Figure 7.3 horizontally. 2. CLKOUT -> CLK30. Re-organize layout recommendation Modify pin description of DVDD1 of test sample. 1.2 1.21 1.22 1.23 1.24 1.30 07/10/2002 07/16/2002 07/29/2002 08/02/2002 08/12/2002 11/28/2002 ©2000-2003 Genesys Logic Inc.—All rights reserved. Page 3 GL800HT25 USB 2.0 UTMI Compliant Transceiver IP Core TABLE OF CONTENTS CHAPTER 1 CHAPTER 2 CHAPTER 3GENERAL DESCRIPTION
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