GS9020A Datasheet | GENNUM

GS9020A - (1/,1; ™,, GS9020A Serial Digital Video Input Processor Features - fully patible with SMPTE 259M - drop-in replacement for the GS9020 - auto-standard operation to 540MHz - embedded EDH and data processing core - selectable loop through or re-serialized EDH-processed serial output - noise immune HVF timing signal outputs - configurable FIFO reset pulse for clearing downstream FIFOs - ANC header and TRS-ID correction for all standards - user controlled output blanking - ITU-R-601 output clipping for active picture area - ancillary data indication - low system power - selectable I²C interface or 8-bit parallel port for access to EDH flags and device configuration bits - EDH flags also available on dedicated pins - seamless flag mapping to GS9021 EDH coprocessor - 80 pin LQFP APPLICATIONS SMPTE 259M serial digital receiver for posite and ponent standards including 4:4:4:4 at 540Mb/s with EDH processing; Noise immune digital sync and timing generation; Cost effective EDH insertion and checking for serial routing and distribution applications. DESCRIPTION DATA SHEET The GS9020A is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling (EDH) ensures the integrity of the data being received from the serial digital interface (SDI). Internal 75Ω termination resistors allow INTERLINX™ seamless connection with the GS9035A Reclocker or the GS9025A Receiver, thus providing a plete high performance, digital video input processor with EDH, digital sync signal generation, and other system Features . The GS9020A also includes a parallel to serial converter and NRZI scrambler to provide re-serialized, EDH pliant data output. The EDH core implements EDH insertion and extraction according to SMPTE...