GS81032AT Overview
Applications The GS81032A is a 1,048,576-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support. Core and Interface Voltages The GS81032A operates on a 3.3 V power...
GS81032AT Key Features
- FT pin for user-configurable flow through or pipeline operation
- Single Cycle Deselect (SCD) operation
- 3.3 V +10%/-5% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to Interleaved Pipeline mode
- Byte Write (BW) and/or Global Write (GW) operation
- mon data inputs and data outputs
- Clock Control, registered, address, data, and control