GS81302TT06E - 144Mb SigmaDDR-II+ Burst of 2 SRAM

This page provides the datasheet information for the GS81302TT06E, a member of the GS81302TT06E-500 144Mb SigmaDDR-II+ Burst of 2 SRAM family.

Product Overview

GSI Technology

Part number	GS81302TT06E
Manufacturer	GSI Technology
File Size	227.52 KB
Description	144Mb SigmaDDR-II+ Burst of 2 SRAM
Datasheet	GS81302TT06E Datasheet
Additional preview pages of the GS81302TT06E datasheet.

2.5 Clock Latency.
Simultaneous Read and Write SigmaDDRTM Interface.
JEDEC-standard pinout and package.
Double Data Rate interface.
Byte Write controls sampled at data-in time.
Burst of 2 Read and Write.
Dual-Range On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs.
1.8 V +100/.
100 mV core power supply.
1.5 V or 1.8 V HSTL Interface.
Pipelined read operation.
Fu.

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Published: Oct 13, 2016 |