Datasheet Summary
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GS815018/36AB-357/333/300/250 ..
119-Bump BGA mercial Temp Industrial Temp Features
- Register-Register Late Write mode, Pipelined Read mode
- 2.5 V +200/- 200 mV core power supply
- 1.5 V or 1.8 V HSTL Interface
- ZQ controlled programmable output drivers
- Dual Cycle Deselect
- Fully coherent read and write pipelines
- Byte write operation (9-bit bytes)
- Differential HSTL clock inputs, K and K
- Asynchronous output enable
- Sleep mode via ZZ
- IEEE 1149.1 JTAG-pliant Serial Boundary Scan
- JEDEC-standard 119-bump BGA package
- Pb-Free 119-bump BGA package available
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
Functional...