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GS816018T-133 - 18Mb Sync Burst SRAMs

This page provides the datasheet information for the GS816018T-133, a member of the GS816018T-250 18Mb Sync Burst SRAMs family.

Features

  • FT pin for user-configurable flow through or pipeline operation.
  • Single Cycle Deselect (SCD) operation.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Internal self-timed write cyc.

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Datasheet preview – GS816018T-133

Datasheet Details

Part number GS816018T-133
Manufacturer GSI Technology
File Size 667.53 KB
Description 18Mb Sync Burst SRAMs
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Full PDF Text Transcription

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100-Pin TQFP Commercial Temp Industrial Temp Preliminary GS816018/32/36T-250/225/200/166/150/133 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect (SCD) operation • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating mode pins • Default to Interleaved Pipeline mode • Byte Write (BW) and/or Global Write (GW) operation • Internal self-timed write cycle • Automatic power-down for portable applications • JEDEC-standard 100-lead TQFP package -250 -225 -200 -166 -150 -133 Unit Pipeline 3-1-1-1 tKQ tCycle 2.
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