Datasheet4U Logo Datasheet4U.com

GS8160Z18DGT-375 - Synchronous NBT SRAM

This page provides the datasheet information for the GS8160Z18DGT-375, a member of the GS8160Z18DGT-333 Synchronous NBT SRAM family.

Description

The GS8160Z18/36DGT is an 18Mbit Synchronous Static SRAM.

Features

  • NBT (No Bus Turn Around) functionality allows zero wait read-write-read bus utilization; Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • User-configurable Pipeline and Flow Through mode.
  • LBO pin for Linear or Interleave Burst mode.
  • Pin compatible with 2Mb, 4Mb, 8Mb, 36Mb, 72Mb and 144Mb devices.
  • Byte write operation.

📥 Download Datasheet

Datasheet preview – GS8160Z18DGT-375

Datasheet Details

Part number GS8160Z18DGT-375
Manufacturer GSI Technology
File Size 343.49 KB
Description Synchronous NBT SRAM
Datasheet download datasheet GS8160Z18DGT-375 Datasheet
Additional preview pages of the GS8160Z18DGT-375 datasheet.

📁 Similar Datasheet

  • GS816118 - (GS816118 - GS816136) Sync Burst SRAMs (GSI)
  • GS816118B - (GS816118B - GS816136B) Sync Burst SRAMs (GSI)
  • GS816132 - (GS816118 - GS816136) Sync Burst SRAMs (GSI)
  • GS816132B - (GS816118B - GS816136B) Sync Burst SRAMs (GSI)
  • GS816136 - (GS816118 - GS816136) Sync Burst SRAMs (GSI)
  • GS816136B - (GS816118B - GS816136B) Sync Burst SRAMs (GSI)
  • GS8161E18 - (GS8161E18 - GS8161E36) Sync Burst SRAMs (GSI)
  • GS8161E32 - (GS8161E18 - GS8161E36) Sync Burst SRAMs (GSI)
  • GS8161E36 - (GS8161E18 - GS8161E36) Sync Burst SRAMs (GSI)
  • GS810C - Microprocessor Reset Monitors (Vishay Siliconix)
Other Datasheets by GSI Technology

Full PDF Text Transcription

Click to expand full text
GS8160Z18/36DGT-400/375/333/250/200/150 100-Pin TQFP Commercial Temp Industrial Temp 18Mb Pipelined and Flow Through Synchronous NBT SRAMs 400 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features • NBT (No Bus Turn Around) functionality allows zero wait read-write-read bus utilization; Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.
Published: |