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GS8170LW36C - (GS8170LW36C / GS8170LW72C) Late Write SigmaRAM

Description

200 MHz

GS8170LW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs.

They are 18,874,368-bit (18Mb) SRAMs.

Features

  • Late Write mode, Pipelined Read mode.
  • JEDEC-standard SigmaRAM™ pinout and package.
  • 1.8 V +150/.
  • 100 mV core power supply.
  • 1.8 V CMOS Interface.
  • ZQ controlled user-selectable output drive strength.
  • Dual Cycle Deselect.
  • Burst Read and Write option.
  • Fully coherent read and write pipelines.
  • Echo Clock outputs track data output drivers.
  • Byte write operation (9-bit bytes).
  • 2 user-programmable chi.

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Datasheet Details

Part number GS8170LW36C
Manufacturer GSI Technology
File Size 946.36 KB
Description (GS8170LW36C / GS8170LW72C) Late Write SigmaRAM
Datasheet download datasheet GS8170LW36C Datasheet

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Full PDF Text Transcription

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GS8170LW36/72C-333/300/250/200 209-Bump BGA Commercial Temp Industrial Temp Features • Late Write mode, Pipelined Read mode • JEDEC-standard SigmaRAM™ pinout and package • 1.8 V +150/–100 mV core power supply • 1.8 V CMOS Interface • ZQ controlled user-selectable output drive strength • Dual Cycle Deselect • Burst Read and Write option • Fully coherent read and write pipelines • Echo Clock outputs track data output drivers • Byte write operation (9-bit bytes) • 2 user-programmable chip enable inputs • IEEE 1149.1 JTAG-compliant Serial Boundary Scan • 209-bump, 14 mm x 22 mm, 1 mm bump pitch BGA package • Pin-compatible with future 36Mb, 72Mb, and 144Mb devices 18Mb Σ1x1Lp CMOS I/O Late Write SigmaRAM™ Functional Description 200 MHz–333 MHz 1.8 V VDD 1.
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